Instruction Level Parallelism - A Historical Perspective: Prof. Roland Ibbett, EPCC (70 Mins, ~64 MB) EPCC Guest Lectures podcast

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Higher Education Podcasting Education Iain Bethune Iain Bethune (ibethune@exseed.ed.ac.uk EPCC University Of Edinburgh

Innhold levert av Iain Bethune and Iain Bethune (ibethune@exseed.ed.ac.uk). Alt podcastinnhold, inkludert episoder, grafikk og podcastbeskrivelser, lastes opp og leveres direkte av Iain Bethune and Iain Bethune (ibethune@exseed.ed.ac.uk) eller deres podcastplattformpartner. Hvis du tror at noen bruker det opphavsrettsbeskyttede verket ditt uten din tillatelse, kan du følge prosessen skissert her https://no.player.fm/legal.

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Instruction Level Parallelism - a historical perspective: Prof. Roland Ibbett, EPCC (70 mins, ~64 MB)

15y ago 1:10:00

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Innhold levert av Iain Bethune and Iain Bethune (ibethune@exseed.ed.ac.uk). Alt podcastinnhold, inkludert episoder, grafikk og podcastbeskrivelser, lastes opp og leveres direkte av Iain Bethune and Iain Bethune (ibethune@exseed.ed.ac.uk) eller deres podcastplattformpartner. Hvis du tror at noen bruker det opphavsrettsbeskyttede verket ditt uten din tillatelse, kan du følge prosessen skissert her https://no.player.fm/legal.

This talk traces the development of the different types of instruction-level parallelism that have been incorporated into the hardware of processors from the early 1960s to the present day. We will see how the use of parallel function units in the CDC 6600 eventually led to the design of the Cray-1 with its vector processing instructions and superscalar processors such as the Alpha. The talk also covers Very Long Instruction Word systems and SIMD systems. The talk is accompanied by visual demonstrations of the activities that occur within processors using simulation models developed using the HASE computer architecture simulation environment.
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Slides - Talk slides

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19 episoder

#Higher Education #Podcasting Education #Iain Bethune #Iain Bethune (ibethune@exseed.ed.ac.uk #EPCC #University Of Edinburgh

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Instruction Level Parallelism - a historical perspective: Prof. Roland Ibbett, EPCC (70 mins, ~64 MB)

EPCC Guest Lectures

published 15y ago

Del

MP3•Episoder hjem

Innhold levert av Iain Bethune and Iain Bethune (ibethune@exseed.ed.ac.uk). Alt podcastinnhold, inkludert episoder, grafikk og podcastbeskrivelser, lastes opp og leveres direkte av Iain Bethune and Iain Bethune (ibethune@exseed.ed.ac.uk) eller deres podcastplattformpartner. Hvis du tror at noen bruker det opphavsrettsbeskyttede verket ditt uten din tillatelse, kan du følge prosessen skissert her https://no.player.fm/legal.

This talk traces the development of the different types of instruction-level parallelism that have been incorporated into the hardware of processors from the early 1960s to the present day. We will see how the use of parallel function units in the CDC 6600 eventually led to the design of the Cray-1 with its vector processing instructions and superscalar processors such as the Alpha. The talk also covers Very Long Instruction Word systems and SIMD systems. The talk is accompanied by visual demonstrations of the activities that occur within processors using simulation models developed using the HASE computer architecture simulation environment.
Links:

Slides - Talk slides

… continue reading

19 episoder

#Higher Education #Podcasting Education #Iain Bethune #Iain Bethune (ibethune@exseed.ed.ac.uk #EPCC #University Of Edinburgh

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